Acorn  Archimedes A420/1
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The Acorn A420/1

The Acorn Archimedes A420/1 was released in June of 1989 alongside the Acorn A410/1 It was basically the same machine, but had 2MByte of RAM instead of 1. It came standard equiped with a 20MByte ST506 harddrive and the new MEMC1A memory controller, which was an improvement over the design of the original Acorn A410

The Acorn A4x0/1 range of computers

The A4x0/1 range of computers were improved versions of the A4x0 range. They included the MEMC1a memory controller which gave the machine a performance improvement over the A4x0 range. The MEMC1a controller is basically two MEMC memory controller with one configured as main, and the other as secondary. The secondary acts purely as a DRAM driver. All DMA operations, I/O controller etc. are handled by the main MEMC controller. Since a single MEMC controller can control up to 4MByte of RAM, dual MEMC, and thus the MEMC1a can control double that memory.

Acorn Archimedes Computers

The Acorn Archimedes computer was the commercially available computer to use the RISC (Reduced Instruction Set CPU) architecture. The first models were launched in 1987, and Acorn developed updated models of the machines until the early 1990's. The CPU in the Acorn machines is the ARM chip, which stands for Acorn RISC Machine. ARM Chips are still used today, one popular example is the iPhone.

Arthur Operating System

The Acorn Archimedes computers were initially shipped with the Arthur OS, but could be upgraded to RISC OS, by replacing the ROM chips that contained the operating system. Because of these ROMs, the computer would boot immediatly into it's GUI, similar to the Atari ST line of computers. This gave them a significant advantage over PC's that loaded the operating system from disk.

The early Archimedes computers used the Arthur operating system, which was replaced in 1989 with RISC OS. RISC-OS featured co-operative multitasking, task management, solid window manipulation, adaptive rendering of bitmaps and coloring, and above all stability that the Arthur OS lacked. New applications quickly started to take advantage of the RISC-OS resulting in mature software such as Acorn Desktop Publisher, and even a PC Emulator.

Source WikiPedia

Acorn ARM CPU

ARM, an acronym for Advanced RISC Machines (originally Acorn RISC Machines) is a Reduced Instruction Set Computer (RISC) cpu architecture. The ARM1, uses a 32-bit internal structure, but only had a 26-bit address space, limiting the processor to 64MByte of memory. This limit was removed in the ARMv3 series, which introduced a full 32-bit address space.

The first machine that used the ARM chip was the BBC Micro, it used the ARM as a secondary processor at 6MHz.

The result of the simulations on the ARM1 boards led to the late 1986 introduction of the ARM2 design running at 8 MHz, and the early 1987 speed-bumped version at 10 to 12 MHz. The ARM2 was roughly seven times the performance of a typical 7 MHz 68000-based system and twice as fast as an Intel 80386 running at 16 MHz.

The ARM2 featured a 32-bit data bus, 26-bit address space and 27 32-bit registers, of which 16 are accessible at any one time (including the Program Counter). The ARM2 had a transistor count of just 30,000, compared to Motorola's 68000 model with around 68,000. This simplicity enabled the ARM2 to have low power consumption, yet offer better performance than the Intel 80286.

A successor, ARM3, was produced with a 4 KB cache, which further improved performance. The address bus was extended to 32 bits in the ARM3.

source: WikiPedia
Technical Details
Released 1989 Brand Acorn Computers Ltd. Type Acorn New Archimedes 400s Name Archimedes A420/1 CPU Class ARM CPU ARM2 @8MHz Memory RAM: 2MB Sound Chip Integrated Sound 8 channel, 8 bit stereo sound Display Chip VIDC1A Video Display Processor Display 640x256, 256 colors
640x512, 16 colors
1024x1024, mono
Best Color 256 Colors Best Graphics 1280x1024 monochrome Sprites 1 hardware sprite System OS RISC OS 3 Storage Internal 800K 3.5" Floppy Disk Drive, 20MB ST506 Hard Drive
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Wikipage about the history of the RISC Operating System
 
RISC OS
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