The National JR-300, released by Matsushita in 1984, represents a significant architectural shift from its predecessors by adopting a multi-processor design. The primary execution environment is centered around a Zilog Z80A CPU, typically clocked at 4 MHz This 8-bit processor handles the system's main logic and allows the machine to run a specialized version of the CP/M operating system, alongside its native JR-BASIC 5.0. By shifting to the Z80 architecture for its primary operations, the JR-300 moved away from the Motorola-derived lineage of the JR-100 and JR-200, positioning itself closer to the professional and high-end hobbyist standards of the mid-1980s Japanese market.

To maintain backward compatibility with software developed for the earlier JR-200, the JR-300 incorporates a secondary Panasonic MN1800A CPU. This chip is an NMOS microprocessor functionally compatible with the Motorola MC6802 In the JR-300's architecture, this second CPU acts as an I/O processor or sub-CPU, managing legacy instruction sets and peripheral interfacing. This dual-processor arrangement is coordinated through a shared bus architecture, allowing the system to toggle between its high-performance Z80 environment and its 6802-compatible legacy mode, effectively housing two distinct logical machines within a single chassis.

The memory subsystem of the JR-300 is configured with 64 KB of System RAM which was the standard limit for many 8-bit machines without complex bank-switching. In addition to the main system memory, the machine features a dedicated 32 KB of Video RAM (VRAM) This separation of memory prevents the CPU from being bottlenecked by display refresh cycles—a common issue in contemporary designs like the Sinclair Spectrum. The graphics are managed by a dedicated controller capable of a maximum resolution of 640 × 400 pixels in monochrome mode, or lower resolutions with a palette of 8 colors, supporting both text-based and high-resolution bitmapped displays.

Interfacing on the JR-300 is managed by a suite of specialized support chips, including the MN1271 for sound, I/O, and timer functions. This chip provides three independent square-wave sound channels and handles the timing for the system's various serial and parallel ports. The machine's physical layout often included a separate "professional" style keyboard connected to a main system unit, diverging from the "all-in-one" keyboard-computer design of the JR-200. This modularity, combined with a built-in Genlock function for overlaying computer graphics onto external video signals, made the JR-300 a unique hybrid tool for both data processing and early desktop video applications.

The memory architecture of the National JR-300 utilizes a combination of memory-mapped I/O and specific port-based addressing. Because it functions as a dual-CPU system, the Z80A serves as the primary master, while the MN1800A (6802 compatible) operates as an intelligent I/O controller.

National JR-300: Z80A Memory Map

The Z80A addresses a 64 KB space, typically partitioned to allow for the coexistence of system ROM, video RAM, and user RAM.

Address Range (Hex)	Function	Description
$0000 – $1FFF	System ROM	Primary BIOS, cold-boot routines, and hardware initialization.
$2000 – $7FFF	JR-BASIC / OS	Interpreter space for JR-BASIC 5.0 or CP/M BIOS integration.
$8000 – $FFFF	User RAM	32 KB contiguous user workspace; subject to bank-switching via I/O port $D8.

Video RAM (VRAM) and Display I/O

The 32 KB of VRAM is generally accessed through a window in the Z80 address space or via dedicated bank-switching registers. This allows the high-resolution 640 × 400 monochrome or 320 × 200 color modes to be updated without exhausting the primary 64 KB user space.

• VRAM Mapping: Often mapped to the $4000 – $BFFF range when specific banking bits are set in the system control register.
• Palette Control: Managed through I/O ports in the $D0 – $DF range, allowing for the selection of the 8-color palette.

I/O Port Assignments

The Z80 uses the `IN` and `OUT` instructions to communicate with peripherals and the sub-CPU.

• $C0 – $C7: MN1271 I/O Controller. Handles the programmable interval timers and the 3-channel square wave sound generator.
• $C8 – $CF: Keyboard and Joysticks. Polling and interrupt control for the proprietary keyboard interface.
• $D8: Bank Switching Register. Controls which ROM or RAM banks are visible to the CPU.
• $E0 – $E7: Sub-CPU Communication. This is the mailbox area where the Z80 sends commands to the MN1800A for JR-200 compatibility or low-level hardware tasks.

Sub-CPU (MN1800A) Interfacing

The MN1800A operates in its own memory space, which includes the legacy JR-200 ROM and 2 KB of workspace RAM. The Z80 triggers the MN1800A via an interrupt or by writing to a specific "Command" port at $E0 Once triggered, the MN1800A takes control of the peripheral bus to execute legacy I/O instructions, effectively insulating the Z80 from the slower timings required by older JR-200 peripherals.

The MN1800A is an 8-bit CMOS microprocessor manufactured by Panasonic (then Matsushita) in the early 1980s.

It is most famous for being a "clone" or highly compatible variant of the Motorola 6802 (which was itself an improved version of the legendary Motorola 6800). If you are familiar with the 6800 family of processors—which powered early industrial equipment and computers like the Altair 680—you’ll find the MN1800A very similar in architecture.

Key Technical Specifications

The MN1800A was designed for home computers and embedded control systems. Here is a breakdown of its core characteristics:

• Word Size: 8-bit data bus.
• Address Space: 16-bit address bus (capable of addressing up to 64 KB of memory).
• Clock Speed:Typically ran around 0.89 MHz to 1 MHz (though the "A" variant could technically handle up to 1.5 MHz).
• Instruction Set: Compatible with the Motorola 6802. It includes 72 instructions with various addressing modes.
• Internal Registers:
  • Two 8-bit Accumulators (A and B): Used for arithmetic and logic operations.
  • 16-bit Index Register (X): Used for memory addressing.
  • 16-bit Stack Pointer (S) and Program Counter (PC).

The most prominent use of the MN1800A was as the main CPU for the Panasonic (National) JR-200 home computer released in 1982.

Interestingly, in that system, the MN1800A didn't work alone. It was paired with a secondary 4-bit processor (the MN1544CJR) that handled input/output (I/O) tasks like managing the keyboard and generating sound. This "dual-processor" setup allowed the MN1800A to focus more on running programs and processing logic.

Comparison: MN1800A vs. Motorola 6802

While they are functionally almost identical, there is one major hardware difference:

• Motorola 6802: Has an internal clock oscillator.
• Panasonic MN1800A: Does not have an internal oscillator; it requires an external clock signal to be provided to the chip.

The Z80 quickly became popular in the personal computer market, with many early personal computers, such as the TRS-80 and Sinclair ZX80, using the Z80 as their central processing unit (CPU). It was also widely used in home computers, such as the MSX range, SORD, and the Amstrad CPC, as well as in many arcade games. Additionally, it was also used in other applications such as industrial control systems, and embedded systems. The Z80 was widely used until the mid-1980s, when it was gradually replaced by newer microprocessors such as the Intel 80286 and the Motorola 68000.

The Z80 microprocessor was developed by Zilog, a company founded by Federico Faggin in 1974. The Z80 was released in July 1976, as a successor to the Intel 8080. It was designed to be fully compatible with the 8080, but also included new features such as an improved instruction set, more powerful interrupts, and a more sophisticated memory management system.

Originally the Z80 was intended for use in embedded systems, just as the 8080 CPU. But the combination of compatibility, superior performance to other CPUs of the era, and the affordability led to a widespread use in arcade video game systems, and later in home computers such as the Osborne 1, TRS-80, ColecoVision, ZX Spectrum, MSX, Sega's Master System and many more. The Z-80 ran the original Pac-Man arcade cabinet. The Z-80 was used even in the Game Gear (1990s), and the TI-81 and succeeding graphic calculators.

The Z-80 remained in production until June of 2024, 48 years after its original release. Zilog replaced the processor with its successor the eZ80, an 8-bit microprocessor that features expanded memory addressing up to 16 megabytes, and running up to 50MHz, comparable to a Z80 clocked at 150MHz.