The A3020 was introduced in 1992 alongside the A3010 to replace the A3000

The A3020 came with 2MByte of RAM instead of the 1MByte of the A3010, and an optional 60 or 80MByte IDE hard-drive

The A3010 and A3020 used the first ARM system-on-chip (SOC), the ARM250. This was a single chip that included an ARM2, IO/Chip, VIDC1a, and MEMC1a. CPU, memory controller, I/O and video were all controlled by the ARM250.

The A3020 was a lower-cost replacement for the A3000 and aimed at the British classrooms. The case was slightly shorter and the mouse port located underneath the A3000 was moved to the back on the A3020.

The Acorn Archimedes computer was the commercially available computer to use the RISC (Reduced Instruction Set CPU) architecture. The first models were launched in 1987, and Acorn developed updated models of the machines until the early 1990's. The CPU in the Acorn machines is the ARM chip, which stands for Acorn RISC Machine. ARM Chips are still used today, one popular example is the iPhone.

The VIDC1a was a refined version of Acorn’s original VIDC1 graphics and sound controller, introduced with later Archimedes models (such as the A3010, A3020, A4000) in the early 1990s. Functionally it was still the same core design — a programmable video timing generator and palette controller coupled with an integrated digital audio system — but it was implemented with improved silicon that addressed some of the original’s limitations. Most importantly, the VIDC1a had tighter tolerances on its pixel clock circuitry and improved signal handling, allowing for more stable operation at higher resolutions and refresh rates. This made it better suited for VGA monitors, which were becoming standard by that time, whereas the original VIDC1 had been tuned around TV-compatible scan rates.

In terms of graphics capability, the VIDC1a retained the same bitmapped display model as the VIDC1, with planar modes ranging from 1bpp (2 colors) up to 8bpp (256 colors), using a 12-bit (4096 color) programmable palette. However, in practice, VIDC1a-based machines could drive more VGA-friendly screen modes, such as 640×480 at 60 Hz in 256 colors, more reliably than the VIDC1, which could produce similar modes but sometimes with signal instability or poor monitor compatibility. Acorn also improved the internal clock divider options, which expanded the range of usable pixel rates and made the chip more versatile with third-party displays. Despite these refinements, the architecture still required the MEMC memory controller to feed pixel data, meaning that overall performance and bandwidth limits were essentially the same as the original VIDC1.

The sound subsystem in the VIDC1a was unchanged in concept: 8-bit stereo PCM playback with DMA-driven sampling. It supported multiple channel mixing at the hardware level, with sample rates tied to clock dividers derived from the master crystal. Compared with PCs of the early 1990s, where audio typically depended on separate add-in cards like the Sound Blaster 16, the VIDC1a’s integrated audio remained a strong feature of Acorn’s machines, giving them multimedia capabilities “out of the box.” In contrast to the original VIDC1, which was notable for being an early hybrid video-and-sound controller, the VIDC1a can be seen as a maturation of the design — not adding radically new features but ensuring the same architecture could survive into the VGA era with improved electrical characteristics and display compatibility.

RISC OS was Acorn’s 32-bit operating system for its ARM-based computers, first introduced in 1987 on the Archimedes line and later used across the A3000, A4000, A5000, and Risc PC families. Written largely in ARM assembly language, it was designed to be highly compact and efficient, booting directly from ROM into a full graphical desktop. Unlike earlier 8-bit Acorn systems that relied on the Master Operating System and BBC BASIC in ROM, RISC OS provided a full windowed GUI, cooperative multitasking, and a modular kernel while still preserving compatibility with BBC BASIC V. Its efficiency was critical, as it needed to run smoothly on ARM2 and ARM3 CPUs at clock speeds as low as 8 MHz, without the benefit of hardware memory protection or virtual memory.

Technically, RISC OS featured a modular structure with a central kernel and relocatable modules that could provide device drivers, filing systems, and higher-level services. System calls were exposed via software interrupts (SWIs), giving user applications access to graphics, font handling, sound, and filesystem operations in a hardware-independent way. The WIMP (Windows, Icons, Menus, Pointer) desktop manager was integrated directly into the OS, providing a consistent GUI framework for applications. The filing system was extensible: RISC OS supported ADFS for hard disks and floppies, NFS for networking, and later third-party systems such as LAN Manager and CD-ROM extensions. Memory management was flat but flexible, with application slots dynamically resized by the OS, a departure from the bank-switched schemes of the 8-bit era.

On later Risc PC machines, RISC OS matured to handle faster ARM processors (ARM610, StrongARM) and larger RAM configurations. Enhancements included long-filename support, better networking stacks, and improved graphics capabilities through VIDC20 hardware. Yet it retained its defining characteristics: ROM-based speed, modularity, and an unusually low memory footprint compared to contemporary operating systems like Windows or Mac OS. This efficiency and directness made RISC OS popular in UK schools and specialist markets well into the 1990s, with many users valuing its instant-on environment and the ability to access both graphical and command-line facilities seamlessly.

ARM, an acronym for Advanced RISC Machines (originally Acorn RISC Machines) is a Reduced Instruction Set Computer (RISC) cpu architecture. The ARM1, uses a 32-bit internal structure, but only had a 26-bit address space, limiting the processor to 64MByte of memory. This limit was removed in the ARMv3 series, which introduced a full 32-bit address space.

The first machine that used the ARM chip was the BBC Micro, it used the ARM as a secondary processor at 6MHz.

The result of the simulations on the ARM1 boards led to the late 1986 introduction of the ARM2 design running at 8 MHz, and the early 1987 speed-bumped version at 10 to 12 MHz. The ARM2 was roughly seven times the performance of a typical 7 MHz 68000-based system and twice as fast as an Intel 80386 running at 16 MHz.

The ARM2 featured a 32-bit data bus, 26-bit address space and 27 32-bit registers, of which 16 are accessible at any one time (including the Program Counter). The ARM2 had a transistor count of just 30,000, compared to Motorola's 68000 model with around 68,000. This simplicity enabled the ARM2 to have low power consumption, yet offer better performance than the Intel 80286.

A successor, ARM3, was produced with a 4 KB cache, which further improved performance. The address bus was extended to 32 bits in the ARM3.