The Acorn A7000 was launched in 1995 as a successor to the Acorn A5000 and featured the new ARM7500 integrated system on a chip, consisting of an ARM CPU, MMU and other components. The A7000 architecture resembled that of the Risc PC to some extent, but it was especially designed to suppor the education market and expected to have at least a seven year life-span.

The A7000, running at 32MHz, had comparable performance ratings to Intel 486DX2 systems running at 66MHz. The computer shipped with 2, 4, or 8MByte of RAM hard soldered to the motherboard, and a single expansion slot to increase memory to 128 MByte.

In 1997 Acorn launched an improved version of the A7000, the A7000+. It had a new ARM7500FE system on a chip that was floating point capable clocking in at 48MHz, and was standard equipped with 8MByte of RAM, expandable to 128MByte.

The Acorn Archimedes computer was the commercially available computer to use the RISC (Reduced Instruction Set CPU) architecture. The first models were launched in 1987, and Acorn developed updated models of the machines until the early 1990's. The CPU in the Acorn machines is the ARM chip, which stands for Acorn RISC Machine. ARM Chips are still used today, one popular example is the iPhone.

The VIDC20 was Acorn’s third-generation video and audio controller, introduced with the RiscPC (1994). Architecturally, it was a significant evolution from the VIDC1/VIDC1a: while those were essentially flexible VGA-timing controllers with 12-bit palette lookup and 8-bit audio DACs, the VIDC20 pushed the design into the mid-1990s multimedia era. Its video datapath expanded from 8 bits per pixel maximum to support true 16-bit and 24-bit packed-pixel modes, allowing thousands or millions of colors to be displayed simultaneously without palette indirection. To sustain this, the VIDC20 required wider and faster memory bandwidth, which was provided in the RiscPC by faster DRAM subsystems and a reworked memory controller.

On the graphics side, the VIDC20 was capable of driving standard VGA and SVGA resolutions up to 1024×768 at 8bpp and 800×600 at 16bpp, with refresh rates in line with PC VGA monitors. Unlike the purely planar model of the VIDC1 family, the VIDC20 introduced chunky pixel addressing for high-color modes, improving performance for software rendering and image manipulation. The palette system was also upgraded: while still offering programmable lookup tables for indexed modes, the hardware supported deeper DACs for truer analog color output. This transition was critical, because it made Acorn systems more competitive in graphical richness at a time when PC clones were adopting SVGA chipsets with 16-bit and 24-bit color capabilities.

The sound subsystem of the VIDC20 was also modernized. It retained the concept of DMA-driven sampled audio, but expanded the resolution to 16-bit stereo PCM output with a wide range of programmable sample rates. The audio path could now achieve CD-quality playback, aligning Acorn’s machines with contemporary multimedia standards. In effect, the VIDC20 combined functions that on PCs were being handled separately by SVGA graphics adapters and 16-bit sound cards, continuing Acorn’s tradition of integrated multimedia controllers. Compared to the earlier VIDC1 and VIDC1a, which were tightly bound to the ARM2/ARM3 memory architecture, the VIDC20 represented a full generational leap: wider datapaths, support for high-color packed pixel formats, and audio fidelity at the level expected in mid-1990s multimedia systems.

RISC OS was Acorn’s 32-bit operating system for its ARM-based computers, first introduced in 1987 on the Archimedes line and later used across the A3000, A4000, A5000, and Risc PC families. Written largely in ARM assembly language, it was designed to be highly compact and efficient, booting directly from ROM into a full graphical desktop. Unlike earlier 8-bit Acorn systems that relied on the Master Operating System and BBC BASIC in ROM, RISC OS provided a full windowed GUI, cooperative multitasking, and a modular kernel while still preserving compatibility with BBC BASIC V. Its efficiency was critical, as it needed to run smoothly on ARM2 and ARM3 CPUs at clock speeds as low as 8 MHz, without the benefit of hardware memory protection or virtual memory.

Technically, RISC OS featured a modular structure with a central kernel and relocatable modules that could provide device drivers, filing systems, and higher-level services. System calls were exposed via software interrupts (SWIs), giving user applications access to graphics, font handling, sound, and filesystem operations in a hardware-independent way. The WIMP (Windows, Icons, Menus, Pointer) desktop manager was integrated directly into the OS, providing a consistent GUI framework for applications. The filing system was extensible: RISC OS supported ADFS for hard disks and floppies, NFS for networking, and later third-party systems such as LAN Manager and CD-ROM extensions. Memory management was flat but flexible, with application slots dynamically resized by the OS, a departure from the bank-switched schemes of the 8-bit era.

On later Risc PC machines, RISC OS matured to handle faster ARM processors (ARM610, StrongARM) and larger RAM configurations. Enhancements included long-filename support, better networking stacks, and improved graphics capabilities through VIDC20 hardware. Yet it retained its defining characteristics: ROM-based speed, modularity, and an unusually low memory footprint compared to contemporary operating systems like Windows or Mac OS. This efficiency and directness made RISC OS popular in UK schools and specialist markets well into the 1990s, with many users valuing its instant-on environment and the ability to access both graphical and command-line facilities seamlessly.

ARM, an acronym for Advanced RISC Machines (originally Acorn RISC Machines) is a Reduced Instruction Set Computer (RISC) cpu architecture. The ARM1, uses a 32-bit internal structure, but only had a 26-bit address space, limiting the processor to 64MByte of memory. This limit was removed in the ARMv3 series, which introduced a full 32-bit address space.

The first machine that used the ARM chip was the BBC Micro, it used the ARM as a secondary processor at 6MHz.

The result of the simulations on the ARM1 boards led to the late 1986 introduction of the ARM2 design running at 8 MHz, and the early 1987 speed-bumped version at 10 to 12 MHz. The ARM2 was roughly seven times the performance of a typical 7 MHz 68000-based system and twice as fast as an Intel 80386 running at 16 MHz.

The ARM2 featured a 32-bit data bus, 26-bit address space and 27 32-bit registers, of which 16 are accessible at any one time (including the Program Counter). The ARM2 had a transistor count of just 30,000, compared to Motorola's 68000 model with around 68,000. This simplicity enabled the ARM2 to have low power consumption, yet offer better performance than the Intel 80286.

A successor, ARM3, was produced with a 4 KB cache, which further improved performance. The address bus was extended to 32 bits in the ARM3.