The BBC Master AIV stood for Advanced Interactive Videodisc. This was essentially a BBC master Turbo with a SCSI interface and a Videodisk Filing System (VFS) ROM built in. This computer formed the basis of the BBC Domesday System.

The BBC Domesday Project was a partnership between Acorn Computers Ltd, Ltd, Philips, Logica and the BBC to mark the 900th anniversary of the original Domesday Book, an 11th century census of England.

The system consisted of a

• BBC Master System
• BBC LV ROM Player
• A set of BBC Domesday Discs for the LV ROM Player
• A color monitor
• A Trackball pointer device

When it was launched in 1986 the System cost £5156.75.

The data on these discs was compiled between 1984 and 1986 and published in 1986. It included a new 'survey' of the United Kingdom, in which people, mostly school children, wrote about geography, history or social issues in their local area or just about their daily lives. This was linked with maps, and many colour photos, statistical data, video and 'virtual walks'. Over 1 million people participated in the project. The project also incorporated professionally-prepared video footage, virtual reality tours of major landmarks and other prepared datasets such as the 1981 census.

The BBC Master did not lack connectors, and had the following ports on the rear:

• ECO-Net connector
• Audio Out
• Cassette port
• RS 432 communications port
• Analoge port
• RGB Monitor connector
• Composite Video connector
• RF Output for TV

The BBC Master was produced in a few variations. Not all were produced in large quantities, and some of them are hard to find.

• Master 128 - First model of the Master series
• Master Turbo - Featured a 65C102 co-processor @4MHz
• Master AIV - Master Turbo with a SCSI interface and a Videodisc
• Master ET - For use on a network, only had RGB and Econet connectors
• Master 512 - Intel 80186 co-processor @ 10MHz to run DOS Plus and GEM
• Master Scientific - Prototype, NS32016 co-processor @ 8MHz
• Master Compact - Compact version of the 128

The Master Operating System (MOS) was the firmware at the core of the BBC Master series, stored in ROM alongside BBC BASIC IV. It evolved directly from the BBC Micro’s MOS but extended its feature set to support the larger memory map, extra ROM sockets, and co-processor options of the Master family. The MOS provided the low-level routines for device I/O, screen and keyboard handling, interrupt servicing, and the command-line interface (*commands). Unlike many contemporary 8-bit microcomputer OSes, the MOS emphasized modularity: ROM-based language interpreters, filing systems, and utilities could be slotted in and invoked seamlessly through a standardized API.

Technically, the Master MOS ran on the 65C12 processor and occupied the upper section of the 16-bit address space, mapped into the top 16 KB of memory. It made heavy use of vectored entry points, with the “OSWORD,” “OSBYTE,” and “OSCLI” calls forming the backbone of its application programming interface. This vector-based approach allowed extensions and filing systems to hook into the OS without patching or breaking existing code. The MOS also provided bank-switching support to take advantage of the Master’s expanded RAM (up to 512 KB in some models) and integrated utilities like the “EDIT” ROM and View family of applications.

A critical innovation in the Master MOS was its coordination with the Tube interface, Acorn’s high-speed second-processor link. When a co-processor such as the 80186 board (in the Master 512) or the 65C102 second processor was active, the MOS suspended most of its local duties and became a host interface layer, forwarding I/O and OS calls between the host hardware and the second processor. This design let the Master run different CPUs and operating environments while maintaining compatibility with MOS services. The Master MOS thus acted as both a conventional 8-bit OS and a hardware abstraction layer, making it one of the more sophisticated firmware environments in the 8-bit era.

BBC BASIC was a high-level programming language created by Acorn Computers in 1981 for the BBC Microcomputer System, commissioned by the BBC Computer Literacy Project. It was based on the earlier Dartmouth BASIC but extended with structured programming features and inline assembler support, making it both beginner-friendly and powerful for advanced users. Unlike many contemporary BASIC dialects, BBC BASIC emphasized readability, supporting named procedures and functions, local variables, and full IF...THEN...ELSE constructs, which helped foster good programming practice among students and hobbyists.

One of the most distinctive aspects of BBC BASIC was its ability to integrate 6502 assembly language directly within BASIC source code. This meant programmers could write performance-critical routines in machine code without leaving the BASIC environment, a feature that was far ahead of its time. Combined with the BBC Micro’s flexible graphics and sound capabilities, BBC BASIC provided a complete toolkit for educational, scientific, and entertainment applications, spanning simple text-based teaching programs to advanced arcade-style games.

BBC BASIC survived long beyond the BBC Micro itself. Versions were ported to CP/M, MS-DOS, RISC OS, Windows, and even modern platforms like iOS and Android through interpreters and emulators. Its legacy lies not only in its technical innovations but also in its cultural impact: an entire generation of UK students learned programming principles through BBC BASIC. Below is a simple code sample that demonstrates its syntax clarity and structure:

  10 REM BBC BASIC with inline 6502 assembly
  20 DIM code 20
  30 FOR pass = 0 TO 2
  40   P% = code
  50   [OPT pass
  60   LDA &70 \ Load value from memory location &70
  70   CLC \ Clear carry
  80   ADC #1 \ Add 1
  90   STA &70 \ Store back to &70
 100   RTS \ Return to BASIC
 110   ]
 120 NEXT
 130 ?&70 = 0 \ Initialize memory location to 0
 140 CALL code \ Call machine code routine
 150 PRINT "Value now = "; ?&70
 160 CALL code
 170 PRINT "Value now = "; ?&70
 180 END


The 65C02 family of CPU's, is binary compatible with the NMOS 6502 instruction set, but it is an enhanced CMOS implementation. The CPU fixes some NMOS 6502 hardware bugs (such as the infamous indirect JMP page-wrap anomaly), reduces power consumption, and adds cycle-accurate “illegal” instruction handling (undefined opcodes are removed). There are different implementations of the 65C02 family. For instance there is the Synerteck SY65SC12 variant, which integrates a synchronous clock generator and typically runs at higher clock rates (up to 14 MHz in some grades) compared to MOS’s 1–2 MHz NMOS parts. Internally, the CMOS design gives fully static operation (the clock can be halted without data loss), adds new instructions (e.g., STZ, TRB, TSB, INC A, DEC A, BRA), and supports expanded addressing modes such as (ZP) indirect addressing. Electrically, it requires CMOS-level signals and produces lower heat dissipation. In short: it will run existing 6502 code unchanged, but behaves more predictably, consumes less power, and provides extra opcodes and addressing options not present in the original MOS NMOS 6502 (STZ, TSB, TRB, INC A, DEC A, BRA, etc.)

The 65C02 is not pin fully compatible with the 6502 CPU. The 65C02 family redefined some pins from the original 6502 design. For instance the S0 pin is not present, and some CMOS implementations have VPB and MLP pins. Depending on the exact pin usage, it is sometimes possible to use a 65C02 in a 6502 socket, but in most cases, the two CPU's are not pin compatible as bus timing and electrical characteristics differe from the NMOS 6502.