The Acorn A540 was launched in June of 1990 and considered the flagship of the Archimedes range of computers. The heart of the computer was the ARM3 CPU, and it could be expanded with an FPA10 floating point accelerator. The machine had standard 4Mbyte of RAM which could be expanded to 16Mbyte using additional RAM cards. Those cards had 4Mbyte each, and each card had their own MEMC1a memory controller unit.

Unlike the other Archimedes computers, this machine came with a SCSI expansion module (Podule) and a 100MByte hard drive. The A540 was launched with the RISC OS 2.01.

The A540 hardware was almost identical to the R260 Workstation except that the RISC iX operating system was not installed in ROM. However, it could be purchased separately on disk.

The Acorn Archimedes computer was the commercially available computer to use the RISC (Reduced Instruction Set CPU) architecture. The first models were launched in 1987, and Acorn developed updated models of the machines until the early 1990's. The CPU in the Acorn machines is the ARM chip, which stands for Acorn RISC Machine. ARM Chips are still used today, one popular example is the iPhone.

The Acorn VIDC1 (commonly just called the VIDC, “Video Controller”) was the graphics and sound processor introduced with the Acorn Archimedes series in 1987. Architecturally, it was not a self-contained GPU like later chips but rather a video timing and data formatter. The VIDC1 worked alongside system RAM, the MEMC (Memory Controller), and the ARM CPU. The MEMC fetched display data from RAM and streamed it to the VIDC, which then generated the appropriate video signals, including pixel clocks, synchronization pulses, and palette lookup. This design meant the graphics system was highly dependent on memory bandwidth, but it gave flexibility in supported modes without requiring large amounts of dedicated VRAM.

Technically, the VIDC1 supported bitmapped graphics in planar arrangements, with depths ranging from 1 bit per pixel (2 colors) up to 8 bits per pixel (256 colors). The palette allowed each of those displayable entries to be mapped from a 12-bit (4:4:4) RGB space, giving 4096 possible colors. The chip could handle resolutions up to 1152×896 in monochrome, though in practice most Archimedes machines used 640×256, 640×512, or 800×600 in color modes, balancing bandwidth against memory and performance. Unlike contemporary PC graphics adapters which often had fixed VGA-style modes, the VIDC’s programmable timing registers meant it could generate a wide range of scan rates suitable for monitors or televisions.

The VIDC1 also integrated basic sound generation, which was unusual for a video controller of its time. It featured 8-bit digital audio playback with support for multiple channels mixed in hardware, using DMA data fetched by the MEMC. This gave the Archimedes stereo sampled sound without burdening the CPU, contrasting with many IBM PCs of the era that relied on simple beepers or required add-in cards like the Sound Blaster. Compared to contemporary chips such as the Motorola 6845 CRTC (used in Amstrad CPC and BBC Micro) or the TI TMS9918A (MSX), the VIDC1 was significantly more advanced, since it combined high-resolution bitmapped graphics with programmable color palettes and digital audio in one chip, optimized to work with the ARM architecture’s memory subsystem.

The Acorn Archimedes computers were initially shipped with the Arthur OS, but could be upgraded to RISC OS, by replacing the ROM chips that contained the operating system. Because of these ROMs, the computer would boot immediatly into it's GUI, similar to the Atari ST line of computers. This gave them a significant advantage over PC's that loaded the operating system from disk.

The early Archimedes computers used the Arthur operating system, which was replaced in 1989 with RISC OS. RISC-OS featured co-operative multitasking, task management, solid window manipulation, adaptive rendering of bitmaps and coloring, and above all stability that the Arthur OS lacked. New applications quickly started to take advantage of the RISC-OS resulting in mature software such as Acorn Desktop Publisher, and even a PC Emulator.

RISC iX is a Unix operating system designed to run especially on the Acorn Archimedes microcomputer. It was completed in 1988, based on BSD v4.3 and first introduced on the R140 on 1989.

Due to a restriction of the hardware, a 32KByte memory page size, processes that stayed in memory that reequired separate pages, gobbled up memory fast. The system therefore introduced shared library support, and paging of compressed executables, to work around some of these memory management unit restrictions.

The operating system was intended for use on the Acorn R140, the Acorn R225 and the R260. The Acorn A540, being almost idendical to the Acorn R260 could also run RISC iX. In order to run this OS on the older A400 machines, a SCSI card and an upgraded memory controller were needed. The A300 and A3000 series did not support RISX iX.

ARM, an acronym for Advanced RISC Machines (originally Acorn RISC Machines) is a Reduced Instruction Set Computer (RISC) cpu architecture. The ARM1, uses a 32-bit internal structure, but only had a 26-bit address space, limiting the processor to 64MByte of memory. This limit was removed in the ARMv3 series, which introduced a full 32-bit address space.

The first machine that used the ARM chip was the BBC Micro, it used the ARM as a secondary processor at 6MHz.

The result of the simulations on the ARM1 boards led to the late 1986 introduction of the ARM2 design running at 8 MHz, and the early 1987 speed-bumped version at 10 to 12 MHz. The ARM2 was roughly seven times the performance of a typical 7 MHz 68000-based system and twice as fast as an Intel 80386 running at 16 MHz.

The ARM2 featured a 32-bit data bus, 26-bit address space and 27 32-bit registers, of which 16 are accessible at any one time (including the Program Counter). The ARM2 had a transistor count of just 30,000, compared to Motorola's 68000 model with around 68,000. This simplicity enabled the ARM2 to have low power consumption, yet offer better performance than the Intel 80286.

A successor, ARM3, was produced with a 4 KB cache, which further improved performance. The address bus was extended to 32 bits in the ARM3.